Field
The disclosure relates generally to switching converters, with current-mode hysteretic operation.
Description
Existing Buck switching converters use both synchronous peak current mode control and synchronous valley current mode control. In synchronous peak current mode control, the high side device (usually a PMOS) is turned on with the clock signal, and turned off with the peak current limit. The low side device (usually an NMOS) is turned on when the high side device is turned off, and remains on until the next clock edge, where the cycle is repeated. In synchronous valley current mode control, the NMOS is turned on with the clock signal, and turned off with the valley current signal. The PMOS is turned on when the NMOS is turned off, and remains on until the next clock edge, where the cycle is repeated.
These are known control schemes for Buck converter and other types of switching converters. In both these schemes, a compensation ramp must be added to the current signal to prevent sub harmonic oscillations. In the case of the peak mode control, the compensation ramp must be added to the sense coil current signal or subtracted from the peak current limit. In the valley mode control scheme, the compensation ramp must be subtracted from the sensed current signal or added to the valley current control level.
In related art known to the inventor, a current-mode hysteretic control scheme is used in a Buck switch converter, referred to as peak-valley mode control, and is asynchronous and not clocked. In this scheme the high side device (usually a PMOS) is turned on when the low side device (usually an NMOS) is turned off by the valley limit. The PMOS remains on until the coil current reaches the peak current limit level, and then is turned off. The NMOS is turned on when the PMOS is turned off, and the coil current falls. When the coil current falls below the valley current control level, the NMOS is turned off and the PMOS is turned on. The cycle is then repeated.
This scheme is asynchronous, and there is no clock input. The frequency is set only by the time taken for the coil current to ramp between the two current limit levels, peak and valley. No compensation ramp is required, as the system fundamentally does not suffer sub harmonic oscillation.
While asynchronous current-mode hysteretic operation is convenient for a wide range of applications, it is sometimes necessary to control the frequency and/or phase of the Buck switching converter. Some examples of this include controlling EMI or noise issues in the application, where it can be beneficial to lock the frequency of the Buck converter to a known frequency, or controlling supply noise spikes to ensure minimal cross-talk between adjacent Buck converters, where it is necessary to phase the Buck converters 180° apart. In addition, in a multi-phase Buck converter, it may be highly beneficial to offset the phases to interleave their switching, or in a Buck converter with coupled coils, the offset of the coupled phases may be critical to correct operation.
It is possible to control the frequency and phase of an asynchronous converter by wrapping a phase lock loop (PLL) or frequency lock loop (FLL) around the switching converter. In this case, the PLL/FLL compares the switching of the Buck converter with an input reference clock. By adjusting the offset between peak and valley current limits, it is possible to increase or decrease the switching frequency of the switching converter.
In this scheme the Buck converter itself forms the voltage-controlled oscillator (VCO) of the FLL/PLL. These schemes are known and have been proven to work. However, the main drawbacks of a PLL/FLL based switching converter is the complexity of the PLL/FLL loop, and the time taken for the loop to adjust the Buck converter and correctly lock onto the reference clock. During this time, the switching converter phase will be uncontrolled. This is of particular concern in a multiphase Buck converter or a Buck converter using coupled coils.